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Conference Papers Year : 2018

Rapid in-memory matrix multiplication using associative processor


Memory hierarchy latency is one of the main problems that prevents processors from achieving high performance. To eliminate the need of loading/storing large sets of data, Resistive Associative Processors (ReAP) have been proposed as a solution to the von Neumann bottleneck. In ReAPs, logic and memory structures are combined together to allow inmemory computations. In this paper, we propose a new algorithm to compute the matrix multiplication inside the memory that exploits the benefits of ReAP. The proposed approach is based on the Cannon algorithm and uses a series of rotations without duplicating the data. It runs in O(n), where n is the dimension of the matrix. The method also applies to a large set of row by column matrix-based applications. Experimental results show several orders of magnitude increase in performance and reduction in energy and area when compared to the latest FPGA and CPU implementations.
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hal-03383708 , version 1 (18-10-2021)



Mohamed Ayoub Neggaz, Hasan Erdem Yantir, Smail Niar, Fadi Kurdahi, Ahmed Eltawil. Rapid in-memory matrix multiplication using associative processor. IEEE-ACM Design, Automation & Test in Europe Conference & Exhibition (DATE'18), Mar 2018, Dresden, Germany. pp.985-990, ⟨10.23919/DATE.2018.8342152⟩. ⟨hal-03383708⟩
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