<?xml version="1.0" encoding="utf-8"?>
<TEI xmlns="http://www.tei-c.org/ns/1.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:hal="http://hal.archives-ouvertes.fr/" xmlns:gml="http://www.opengis.net/gml/3.3/" xmlns:gmlce="http://www.opengis.net/gml/3.3/ce" version="1.1" xsi:schemaLocation="http://www.tei-c.org/ns/1.0 http://api.archives-ouvertes.fr/documents/aofr-sword.xsd">
  <teiHeader>
    <fileDesc>
      <titleStmt>
        <title>HAL TEI export of hal-03387943</title>
      </titleStmt>
      <publicationStmt>
        <distributor>CCSD</distributor>
        <availability status="restricted">
          <licence target="https://creativecommons.org/publicdomain/zero/1.0/">CC0 1.0 - Universal</licence>
        </availability>
        <date when="2026-05-16T11:32:38+02:00"/>
      </publicationStmt>
      <sourceDesc>
        <p part="N">HAL API Platform</p>
      </sourceDesc>
    </fileDesc>
  </teiHeader>
  <text>
    <body>
      <listBibl>
        <biblFull>
          <titleStmt>
            <title xml:lang="en">Design Space Exploration for Customized Asymmetric Heterogeneous MPSoC.</title>
            <author role="aut">
              <persName>
                <forename type="first">Bouthaina</forename>
                <surname>Damak</surname>
              </persName>
              <idno type="halauthorid">2314845-0</idno>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Rachid</forename>
                <surname>Benmansour</surname>
              </persName>
              <email type="md5">f16097cfabfb58599b766bda788a6571</email>
              <email type="domain">gmail.com</email>
              <idno type="idhal" notation="numeric">952626</idno>
              <idno type="halauthorid" notation="string">802984-952626</idno>
              <idno type="ORCID">https://orcid.org/0000-0003-2553-4116</idno>
              <affiliation ref="#struct-1303"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Mouna</forename>
                <surname>Baklouti</surname>
              </persName>
              <email type="md5">d4d025911d1617f6b700bfc9829ade1c</email>
              <email type="domain">enis.rnu.tn</email>
              <idno type="idhal" notation="numeric">948692</idno>
              <idno type="halauthorid" notation="string">496592-948692</idno>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Smail</forename>
                <surname>Niar</surname>
              </persName>
              <email type="md5">c927c7301432e09b2d566dd291e0c0f1</email>
              <email type="domain">uphf.fr</email>
              <idno type="idhal" notation="string">smail-niar</idno>
              <idno type="idhal" notation="numeric">921561</idno>
              <idno type="halauthorid" notation="string">620220-921561</idno>
              <idno type="ORCID">https://orcid.org/0000-0002-7550-484X</idno>
              <idno type="IDREF">https://www.idref.fr/084751142</idno>
              <idno type="ISNI">http://isni.org/isni/0000000003006820</idno>
              <idno type="VIAF">https://viaf.org/viaf/19933583</idno>
              <orgName ref="#struct-1001263"/>
              <affiliation ref="#struct-1303"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Mohamed</forename>
                <surname>Abid</surname>
              </persName>
              <email type="md5">704c901311dc648502c595d086d599e9</email>
              <email type="domain">gmail.com</email>
              <idno type="idhal" notation="numeric">882890</idno>
              <idno type="halauthorid" notation="string">147001-882890</idno>
              <idno type="ORCID">https://orcid.org/0000-0001-7409-292X</idno>
            </author>
            <editor role="depositor">
              <persName>
                <forename>Julie</forename>
                <surname>Cagniard</surname>
              </persName>
              <email type="md5">1dce28e8d881110b28c59f67e22e9de1</email>
              <email type="domain">uphf.fr</email>
            </editor>
          </titleStmt>
          <editionStmt>
            <edition n="v1" type="current">
              <date type="whenSubmitted">2021-10-20 10:13:25</date>
              <date type="whenModified">2024-05-18 03:25:23</date>
              <date type="whenReleased">2021-10-20 10:13:25</date>
              <date type="whenProduced">2014-08-27</date>
            </edition>
            <respStmt>
              <resp>contributor</resp>
              <name key="537167">
                <persName>
                  <forename>Julie</forename>
                  <surname>Cagniard</surname>
                </persName>
                <email type="md5">1dce28e8d881110b28c59f67e22e9de1</email>
                <email type="domain">uphf.fr</email>
              </name>
            </respStmt>
          </editionStmt>
          <publicationStmt>
            <distributor>CCSD</distributor>
            <idno type="halId">hal-03387943</idno>
            <idno type="halUri">https://uphf.hal.science/hal-03387943</idno>
            <idno type="halBibtex">damak:hal-03387943</idno>
            <idno type="halRefHtml">&lt;i&gt;2014 17th Euromicro Conference on Digital System Design (DSD)&lt;/i&gt;, Aug 2014, Verona, Italy. pp.50-57, &lt;a target="_blank" href="https://dx.doi.org/10.1109/DSD.2014.83"&gt;&amp;#x27E8;10.1109/DSD.2014.83&amp;#x27E9;&lt;/a&gt;</idno>
            <idno type="halRef">2014 17th Euromicro Conference on Digital System Design (DSD), Aug 2014, Verona, Italy. pp.50-57, &amp;#x27E8;10.1109/DSD.2014.83&amp;#x27E9;</idno>
            <availability status="restricted"/>
          </publicationStmt>
          <seriesStmt>
            <idno type="stamp" n="CNRS">CNRS - Centre national de la recherche scientifique</idno>
            <idno type="stamp" n="UNIV-VALENCIENNES">Université de Valenciennes et du Hainaut-Cambresis</idno>
            <idno type="stamp" n="LAMIH" corresp="UNIV-VALENCIENNES">Laboratoire d’Automatique, de Mécanique et d’Informatique Industrielles et Humaines</idno>
            <idno type="stamp" n="TEST-UPHF">TEST-UPHF</idno>
          </seriesStmt>
          <notesStmt>
            <note type="audience" n="2">International</note>
            <note type="invited" n="0">No</note>
            <note type="popular" n="0">No</note>
            <note type="peer" n="1">Yes</note>
            <note type="proceedings" n="1">Yes</note>
          </notesStmt>
          <sourceDesc>
            <biblStruct>
              <analytic>
                <title xml:lang="en">Design Space Exploration for Customized Asymmetric Heterogeneous MPSoC.</title>
                <author role="aut">
                  <persName>
                    <forename type="first">Bouthaina</forename>
                    <surname>Damak</surname>
                  </persName>
                  <idno type="halauthorid">2314845-0</idno>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Rachid</forename>
                    <surname>Benmansour</surname>
                  </persName>
                  <email type="md5">f16097cfabfb58599b766bda788a6571</email>
                  <email type="domain">gmail.com</email>
                  <idno type="idhal" notation="numeric">952626</idno>
                  <idno type="halauthorid" notation="string">802984-952626</idno>
                  <idno type="ORCID">https://orcid.org/0000-0003-2553-4116</idno>
                  <affiliation ref="#struct-1303"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Mouna</forename>
                    <surname>Baklouti</surname>
                  </persName>
                  <email type="md5">d4d025911d1617f6b700bfc9829ade1c</email>
                  <email type="domain">enis.rnu.tn</email>
                  <idno type="idhal" notation="numeric">948692</idno>
                  <idno type="halauthorid" notation="string">496592-948692</idno>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Smail</forename>
                    <surname>Niar</surname>
                  </persName>
                  <email type="md5">c927c7301432e09b2d566dd291e0c0f1</email>
                  <email type="domain">uphf.fr</email>
                  <idno type="idhal" notation="string">smail-niar</idno>
                  <idno type="idhal" notation="numeric">921561</idno>
                  <idno type="halauthorid" notation="string">620220-921561</idno>
                  <idno type="ORCID">https://orcid.org/0000-0002-7550-484X</idno>
                  <idno type="IDREF">https://www.idref.fr/084751142</idno>
                  <idno type="ISNI">http://isni.org/isni/0000000003006820</idno>
                  <idno type="VIAF">https://viaf.org/viaf/19933583</idno>
                  <orgName ref="#struct-1001263"/>
                  <affiliation ref="#struct-1303"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Mohamed</forename>
                    <surname>Abid</surname>
                  </persName>
                  <email type="md5">704c901311dc648502c595d086d599e9</email>
                  <email type="domain">gmail.com</email>
                  <idno type="idhal" notation="numeric">882890</idno>
                  <idno type="halauthorid" notation="string">147001-882890</idno>
                  <idno type="ORCID">https://orcid.org/0000-0001-7409-292X</idno>
                </author>
              </analytic>
              <monogr>
                <meeting>
                  <title>2014 17th Euromicro Conference on Digital System Design (DSD)</title>
                  <date type="start">2014-08-27</date>
                  <date type="end">2014-08-29</date>
                  <settlement>Verona</settlement>
                  <country key="IT">Italy</country>
                </meeting>
                <imprint>
                  <publisher>IEEE</publisher>
                  <biblScope unit="pp">50-57</biblScope>
                </imprint>
              </monogr>
              <idno type="doi">10.1109/DSD.2014.83</idno>
            </biblStruct>
          </sourceDesc>
          <profileDesc>
            <langUsage>
              <language ident="en">English</language>
            </langUsage>
            <textClass>
              <keywords scheme="author">
                <term xml:lang="en">"Mixed integer linear programming"</term>
                <term xml:lang="en">"Acceleration"</term>
                <term xml:lang="en">"Resource management"</term>
                <term xml:lang="en">"Space exploration"</term>
                <term xml:lang="en">"Field programmable gate arrays"</term>
                <term xml:lang="en">"Hardware"</term>
                <term xml:lang="en">"Computer architecture"</term>
              </keywords>
              <classCode scheme="halDomain" n="info">Computer Science [cs]</classCode>
              <classCode scheme="halTypology" n="COMM">Conference papers</classCode>
              <classCode scheme="halOldTypology" n="COMM">Conference papers</classCode>
              <classCode scheme="halTreeTypology" n="COMM">Conference papers</classCode>
            </textClass>
            <abstract xml:lang="en">
              <p>Modern FPGA allows the design of very complex System-on-Chips (SoC). To fulfil modern application requirements, in terms of performance/energy consumption ratio, Heterogeneous Multiprocessor System-on-Chip (Ht- MPSoC) architectures represent a promising solution. In such systems, the processor instruction set is enhanced by application-specific custom instructions implemented on reconfigurable fabrics, namely FPGA. To increase area utilization and guarantee application constraint respect, we propose a new Ht-MPSoC architecture where hardware accelerators (HW accelerators) are shared among different processors in an intelligent manner. In this paper, we extend existing Ht-MPSoC architectures by considering asymmetric (AHt-MPSoC). In these architectures, cores have different resources that may share in different manners. Depending on the running applications and their needs in processing, private and shared HW accelerators are attached to the different cores. On a 8-core AHt-MPSoC we obtained a speed of 2.6 with a reduced number of HW accelerators for our benchmarks.</p>
            </abstract>
          </profileDesc>
        </biblFull>
      </listBibl>
    </body>
    <back>
      <listOrg type="structures">
        <org type="laboratory" xml:id="struct-1303" status="OLD">
          <idno type="IdRef">050705253</idno>
          <idno type="ISNI">0000000122013679</idno>
          <idno type="RNSR">201220427F</idno>
          <idno type="ROR">https://ror.org/006z7v557</idno>
          <orgName>Laboratoire d'Automatique, de Mécanique et d'Informatique industrielles et Humaines - UMR 8201</orgName>
          <orgName type="acronym">LAMIH</orgName>
          <date type="start">1994-01-01</date>
          <date type="end">2019-12-31</date>
          <desc>
            <address>
              <addrLine>LE MONT HOUY 59313 VALENCIENNES CEDEX 9</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.uphf.fr/LAMIH/fr</ref>
          </desc>
          <listRelation>
            <relation active="#struct-300279" type="direct"/>
            <relation name="UMR8201" active="#struct-441569" type="direct"/>
          </listRelation>
        </org>
        <org type="institution" xml:id="struct-300279" status="OLD">
          <idno type="IdRef">026404079</idno>
          <idno type="ISNI">0000000107901416</idno>
          <idno type="ROR">https://ror.org/02ezch769</idno>
          <orgName>Université de Valenciennes et du Hainaut-Cambrésis</orgName>
          <orgName type="acronym">UVHC</orgName>
          <date type="start">1979-01-01</date>
          <date type="end">2019-09-08</date>
          <desc>
            <address>
              <addrLine>Campus Mont Houy59313 Valenciennes Cedex 9</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.uphf.fr/</ref>
          </desc>
        </org>
        <org type="regroupinstitution" xml:id="struct-441569" status="VALID">
          <idno type="IdRef">02636817X</idno>
          <idno type="ISNI">0000000122597504</idno>
          <idno type="ROR">https://ror.org/02feahw73</idno>
          <orgName>Centre National de la Recherche Scientifique</orgName>
          <orgName type="acronym">CNRS</orgName>
          <date type="start">1939-10-19</date>
          <desc>
            <address>
              <country key="FR"/>
            </address>
            <ref type="url">https://www.cnrs.fr/</ref>
          </desc>
        </org>
      </listOrg>
    </back>
  </text>
</TEI>