CMOS inverter based on Schottky source-drain MOS technology with low-temperature dopant segregation
Résumé
This letter demonstrates the integration of complementary dopant-segregated Schottky barrier MOSFETs into CMOS inverters. The implementation of a valence-band-edge silicide, namely, PtSi, associated to arsenic (As) and boron (B) low-temperature segregation is validated for the first time at the circuit level. Current drives for n- and p-type devices are I on = 596/378 μA/μm at V ds = |1.1 V| and |V gs | = 2 V to account for the 2.4-nm gate oxide thickness. Excellent inverter voltage transfer characteristics, large voltage gain, and appreciable noise margins have been obtained down to 0.5 V of supply voltage.
Domaines
Sciences de l'ingénieur [physics]Origine | Fichiers produits par l'(les) auteur(s) |
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